JTAGTest: Affordable JTAG testing and development solution

Time 2021-11-09 10:07:59

Web Name: JTAGTest: Affordable JTAG testing and development solution

WebSite: http://www.jtagtest.com

ID:226305

Keywords:

JTAG,Affordable,JTAGTest,testing,solution,development,and,JTAGTest,AffordableIEE

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keywords:JTAGTest, Affordable IEEE 1149.1 JTAG testing and development solution
description:JTAGTest, Affordable IEEE 1149.1 JTAG testing and development solution
JTAG TestJTAGTest: Affordable JTAG testing and development solution HomeProductsDocumentationDownloadOrderFAQResourcesAbout usSee more JTAGTest screenshotsClick here to check prices and order now!

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JTAGTest and ViaTAP are multiplatform! They work both on Microsoft Windows and Linux!

About IEEE1149.1 JTAG TestJTAGTest is invaluable tool for all embedded designers, production houses and service companies.JTAGTest helps you with PCB debugging, prototyping, testing and repairing. The device pin signals or internal signals can be monitored in real-time without interfering with normal device operation, or you can activelychange pin states.All this is possible using an IEEE 1149.1 (JTAG) boundary-scan. Key features JTAGTest FeaturesComplex functionalityVisualised PCB debug3^rd party supportSupported standardsScripting supportViaTAP hardware JTAGTest

Plase move mouse over features on the left hand side to view more information.

ScreenshotsFAQ SectionOrder now!Documentation

Wide range of functions

JTAGTest has easy to use interface. It was originally used as a in-house tool for a few years, before it went public.

Automatic JTAG Scan chain detection is provided, you don't have to specify parts in a chain by hand.

JTAGTest provides visualised boundary scan debugging which allows to view and control pin/ball/pad states. Furthermore, everything can be recorded, which turns JTAGTest into a logic analyzer.

Visualised PCB debug

JTAGTest has intuitive, very easy to use interface. Devices in a chain are automatically displayed as icons.

Visualised boundary scan: device pin, pad or BGA ball states can be displayed as a listing or graphical chip view. Logic levels are displayed using colors.

Boundary scan mode also allows easy probing and controlling each by selecting desired state from a list. You can also record waveform for further analysis. JTAGTest can be turned into logic analyzer!

3^rd party CAD/CAE application support

JTAGTest supports SVF programming, you can use it to program various devices (tested on Xilinx ISE, Altera Quartus and Lattice ispLever)

We provide ULP script to export netlist from Cadsoft Eagle

Xilinx *.UCF, Altera *.PIN or Lattice *.LCT files can be loaded into JTAGTest.

JTAGTest is following standards

JTAGTest and ViaTAP JTAG-USB Interface are IEEE 1149.1 compliant

Industry-standard BSDL, HSDL and SVF files are fully supported, including various extensions

Hardware supports more than 20 widely used JTAG pinouts

Scripting support

JTAGTest provides ECMA-262 compatible scripting language which can be used for extended debugging, bulk programming, testing, or production.

ViaTAP JTAG-USB Interface

Our ViaTAP JTAG-USB Inteface supports more than 20 widely used JTAG pinouts, so you can smoothly use it for you existing designs or evaluation boards.

The interface is fully compliant with IEEE 1149.1 and we have tested it with almost all common chips available on market.

You can use ViaTAP not just with JTAGTest, but also our other programs!

Requirements PC with Windows 2000/XP/Vista 256 MB RAM 1GB HDD space (for BSDL files) USB 2.0 portThis is a new product that we have originally used for in-house development but now decided to sell it to general public.Click here to download documentation and manuals

JTAGTest costs only US $119 (including ViaTAP JTAG USB Interface).
Check our affordable prices here.

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JTAGTest, Affordable IEEE 1149.1 JTAG testing and development solution

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